ETS2020 Tallinn, Estonia
25th IEEE European Test Symposium
May 25-29, 2020, Tallinn, ESTONIA

Call for Papers

The IEEE European Test Symposium (ETS) is Europe's premier forum dedicated to presenting and discussing scientific results, emerging ideas, applications, hot topics and new trends in the area of electronic-based circuits and system testing, reliability, security and validation. In 2020, ETS will take place in the Radisson Blu Sky Hotel in Tallinn. The city is known for the picturesque Old Town with its medieval architecture. It is organized by the Tallinn University of Technology (TalTech), which co-sponsors the event jointly with the IEEE Council on Electronic Design Automation (CEDA). In addition to scientific paper submissions, ETS offers a track for informal contributions dedicated to early hot ideas and relevant case studies as well as a PhD forum. A Test Spring School and Fringe Workshops will be organized in conjunction with ETS'20.

This year we will celebrate the 25th edition of ETS!

You are invited to participate and submit your contributions to ETS'20. The areas of interest include (but are not limited to) the following topics:

  • 3D IC and SiP Test
  • Analog, Mixed-signal and RF Test
  • Approximate Circuit Testing
  • ATE Hardware and Software
  • Automatic Test Generation
  • Automotive and Avionics Test
  • Board Test and Diagnosis
  • Built-In Self-Test
  • Current-Based Test
  • Defect-Based Test
  • Delay and Performance Test
  • Dependability
  • Design for Test
  • DfX (Design for Manufacturing, Reliability, Yield, etc.)
  • Diagnosis and Silicon Debug
  • Economics of Test
  • Extra-Functional Aspects
  • Failure Analysis
  • Fault Modeling
  • Fault Simulation
  • Fault Tolerance
  • Functional Safety
  • Hardware Security
  • Heterogeneous and Emerging Architectures
  • High-Speed I/0 Test
  • IoT and CPS Dependability
  • Low-Power Test
  • Machine Learning and Test
  • Memory Test and Repair
  • Microsystems / MEMS / Sensors Test
  • On-line Test
  • Power- / Thermal-Aware Test
  • Processor Test (Multi-Core, GPU, CPU, Neuromorphic, etc.)
  • Security-Test Trade-offs
  • Self-X (Awareness, Repair, Test, etc.)
  • Signal Integrity Test
  • SoC and NoC Test
  • Standards in Test
  • Test for Reversible and Quantum Circuits
  • Test of Reconfigurable Systems (FPGA, CPLD, etc.)
  • Test, Reliability and Security of Emerging Technologies
  • Trojan Detection
  • Verification and Validation
  • Yield Analysis and Enhancement

Publications

ETS'20 will produce Formal Proceedings of scientific papers with ISBN number that will be indexed by the IEEE Xplore Digital Library. Also, an Informal Digest will collect contributions in other categories with an open access on-line archiving option.

Submissions

ETS'20 seeks original, unpublished contributions of the following types:

  • Scientific Papers for the Formal Proceedings, presenting novel and complete research work
  • Informal Contributions including case studies and work in progress on hot topics
  • PhD Forum Contributions from students eager to discuss their on-going research
  • Proposals for Panels, Embedded Tutorials, Special Sessions and Fringe Workshops
  • Vendor Presentations focusing on new features of test related products

Key Dates for Scientific Papers

  • Submission deadline December 9, 2019
  • Notification of acceptance February 13, 2020
  • Camera-ready manuscript April 1, 2020

Further Information

General Chairs

Program Chairs

Download Call for Papers [PDF]

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